Ever increasing performance demands are being placed on computer circuits, microprocessors, application specific integrated circuits (ASICs) and other ICs and VLSICs. ASICs, ICs and VLSICs are being required to operate at continually increasing clock speeds to perform more operations in a shorter period of time. To provide these faster operating speeds, circuits and processes are being designed with increasingly smaller geometries and with lower threshold voltages. With these smaller geometries and lower threshold voltages, the flow of leakage current from a system power supply to a circuit supplied by the system power supply tends to increase. In the aggregate, such leakage currents can result in a significant amount of power consumption in a circuit. This can be critical in mobile, battery powered electronic devices, such as cellular telephones, mobile radios, laptop computers and handheld computing devices and the like, where the ability to operate for extended periods of time on battery power is of primary importance to users.
FIG. 1 depicts a known arrangement for reducing leakage current and power consumption in a circuit through the use of sleep transistors located between the system power supply and a given memory module on an integrated circuit. This arrangement is described, e.g., in U.S. Pat. No. 6,515,513 to Ye et al., U.S. Pat. No. 6,744,301 to Tchanz et al., and U.S. Pat. No. 6,754,414 to Keshavarzi et al. With reference to FIG. 1, when the sleep transistors Q1 and Q2 are active or turned on, the system power supply provides current to the circuit through the sleep transistors. When sleep transistors Q1 and Q2 are idle or turned off, the intent is that no current is supplied to the circuit. Nonetheless, some leakage current still tends to flow through the sleep transistors, depending upon the characteristics of the sleep transistors and the circuit or load. Because even these leakage currents constitute an ongoing power loss that tends to deplete a device's batteries, it would be highly desirable to provide an integrated circuit with improved leakage current characteristics.